1. Field of the Invention
The present invention relates to an IC memory card. More particularly, the present invention pertains to a memory card whose memory chip is accessed when the memory card is connected to a terminal machine through a connector.
2. Description of the Related Art
FIG. 5 is a block diagram of a conventional IC memory card. The IC memory card 1 has an input/output connector 2 which can be connected to a terminal (not shown), and an IC memory chip 3 which is connected to the connector 2 through an address bus 4, a control bus 5, and a data bus 6.
Generally, the control bus 5 comprises a chip enable signal line, an output enable signal line, a write enable signal line which must be activated to write data on or read data from the IC memory card 1. The address bus 4 consists of 15 signal lines A.sub.0 to A.sub.14 if the IC memory card 1 carries, for example, a single 256 Kbit IC memory chip 3. The data bus 6 contains 8 signal lines D.sub.0 to D.sub.7. In addition to the above-described signal lines, a power line, a grounding line, a card detect signal line, a write protect signal line and so on are present on the IC memory card 1. However, more than half of the pins of the connector 2 are used for the address bus 4 and the data bus 6.
In a case where the connector pin for the power line or the grounding line has a contact failure, the IC memory card 1 does not work at all. This anomaly can therefore be easily detected by the terminal machine to which the IC memory card 1 is connected. In a case where the connector pins for the control bus 5 have a contact failure, normal reading/writing of data to and from the IC memory card 1 is impossible, and the anomaly can thus be easily detected by the terminal machine, as in the above-described case. Furthermore, determination as to whether or not the data bus 6 is normal can be made by writing known data on the IC memory card 1 from the terminal machine, by reading it out and then by collating the data. The determination, however, requires the use of known data, such as 00.sub.H, ff.sub.H, 55.sub.H or AA.sub.H.
However, it is impossible to find a contact failure which occurs on the connector pins for the address bus 4 because data, which is written on a false address area due to the contact failure, is read out from that false address area. Continuation of reading/writing of data in that state may damage the data stored in the IC memory chip 3.
For example, when data 55.sub.H is to be written on address 111.sub.H, if address 101.sub.H is accessed due to a contact failure of the connector pin for the signal line A.sub.4 in the address bus 4, the data 55.sub.H is written on address 101.sub.H. Thereafter, when the address 111.sub.H is designated for inspection, the data 55.sub.H stored on the address 101.sub.H is read out. Thus, collation of the written data with the read data indicates that the address bus 4 is normal and it is thus impossible to find the contact failure of the connector pin.
In that case, when data is to be written on or read from address 101.sub.H by the terminal machine, data is written on or read from the address 101H. So, the address where data is written or read when the address 101H is designated is the same as that where data is written or read when the address 111H is designated. This may damage the data stored in the IC memory chip 3.
Thus, the conventional IC memory card 1 has disadvantages in that the contact failure of the connector pins for the address bus 4 cannot be readily found, and in that the data stored in the IC card may be damaged.